clock函数返回值（clockgettime函数）

科技前沿 • 2025-05-27 11:56 • 阅读 46

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 <svg xmlns="http://www.w3.org/2000/svg" style="display: none;"> <path stroke-linecap="round" d="M5,0 0,2.5 5,5z" id="raphael-marker-block" style="-webkit-tap-highlight-color: rgba(0, 0, 0, 0);"></path> </svg> <p>__IO uint32_t APB2RSTR; //APB2上的外设复位寄存器<br /> __IO uint32_t APB1RSTR; // APB1上的外设复位寄存器<br /> __IO uint32_t AHBENR; //DMA、CRC等模块时钟使能<br /> __IO uint32_t APB2ENR; //APB2外设时钟使能<br /> __IO uint32_t APB1ENR; //APB1外设时钟使能<br /> __IO uint32_t BDCR; //备份域控制寄存器<br /> __IO uint32_t CSR; //控制状态寄存器<br /> } RCC_TypeDef;</p>

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void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) /
/
Set HSION bit /
RCC->CR |= (uint32_t)0x00000001;

/ Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits /
RCC->CFGR &= (uint32_t)0xF8FF0000;

/ Reset HSEON, CSSON and PLLON bits /
RCC->CR &= (uint32_t)0xFEF6FFFF;

/ Reset HSEBYP bit /
RCC->CR &= (uint32_t)0xFFFBFFFF;

/ Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits /
RCC->CFGR &= (uint32_t)0xFF80FFFF;

/ Disable all interrupts and clear pending bits /
RCC->CIR = 0x009F0000;
#endif /

STM32F10X_CL /

/ Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers /
/
Configure the Flash Latency cycles and enable prefetch buffer /
SetSysClock();
}

static void SetSysClock(void)
{
#ifdef SYSCLK_FREQ_HSE
SetSysClockToHSE();
#elif defined SYSCLK_FREQ_24MHz
SetSysClockTo24();
#elif defined SYSCLK_FREQ_36MHz
SetSysClockTo36();
#elif defined SYSCLK_FREQ_48MHz
SetSysClockTo48();
#elif defined SYSCLK_FREQ_56MHz
SetSysClockTo56();
#elif defined SYSCLK_FREQ_72MHz
SetSysClockTo72();
#endif
}

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static void SetSysClockTo72(void)
{
__IO uint32_t StartUpCounter = 0, HSEStatus = 0;

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/ SYSCLK, HCLK, PCLK2 and PCLK1 configuration —————————/
/
Enable HSE /
RCC->CR |= ((uint32_t)RCC_CR_HSEON);

/ Wait till HSE is ready and if Time out is reached exit /
do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

if (HSEStatus == (uint32_t)0x01)
{
/ HCLK = SYSCLK /
RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;

RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);

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}
else
{ / If HSE fails to start-up, the application will have wrong clock
configuration. User can add here some code to deal with this error */
}
}

RCC->CR |= ((uint32_t)RCC_CR_HSEON);

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do
{
HSEStatus = RCC->CR & RCC_CR_HSERDY;
StartUpCounter++;
} while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));

RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
RCC_CFGR_PLLMULL));
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);

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clock函数返回值（clockgettime函数）

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